ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366
Table 6. Pin Descriptions (Continued)
State During and
Pin
BOOT_CFG1–0
Type
I
After Reset
Input only
Function
Boot Configuration Select. This pin is used to select the boot mode for the processor.
The BOOT_CFG pins must be valid before reset is asserted. For a description of the boot
mode, refer to Table 5 , Boot Mode Selection.
RESETOUT
RESET
O Output only
I/A Input only
Reset Out. Drives out the core reset signal to an external device.
Processor Reset. Resets the ADSP-2136x to a known state. Upon deassertion, there is a
4096 CLKIN cycle latency for the PLL to lock. After this time, the core begins program
execution from the hardware reset vector address. The RESET input must be asserted
(low) at power-up.
TCK I Input only 3
Test Clock (JTAG). Provides a clock for JTAG boundary scan. TCK must be asserted
(pulsed low) after power-up or held low for proper operation of the processors.
TMS I/S
(pu)
TDI I/S
(pu)
Three-state with
pull-up enabled
Three-state with
pull-up enabled
Test Mode Select (JTAG). Used to control the test state machine. TMS has a 22.5 kΩ
internal pull-up resistor.
Test Data Input (JTAG). Provides serial data for the boundary scan logic. TDI has a
22.5 kΩ internal pull-up resistor.
TDO O Three-state 4
Test Data Output (JTAG). Serial scan output of the boundary scan path.
TRST
I/A
(pu)
Three-state with
pull-up enabled
Test Reset (JTAG). Resets the test state machine. TRST must be asserted (pulsed low)
after power-up or held low for proper operation of the ADSP-2136x. TRST has a 22.5 kΩ
internal pull-up resistor.
EMU
V DDINT
V DDEXT
A VDD
O (O/D)
(pu)
P
P
P
Three-state with
pull-up enabled
Emulation Status. Must be connected to the processor ’s JTAG emulators target board
connector only. EMU has a 22.5 kΩ internal pull-up resistor.
Core Power Supply. Supplies the processor ’s core.
I/O Power Supply.
Analog Power Supply. Supplies the processor ’s internal PLL (clock generator). This pin
has the same specifications as V DDINT , except that added filtering circuitry is required. For
A VSS
G
Analog Power Supply Return.
GND G
Power Supply Return.
The following symbols appear in the Type column of Table 6 : A = asynchronous, G = ground, I = input, O = output, P = power supply,
S = synchronous, ( A/D ) = active drive, ( O/D ) = open drain, and T = three-state, ( pd ) = pull-down resistor, ( pu ) = pull-up resistor.
1
2
3
4
RD, WR, and ALE are three-stated (and not driven) only when RESET is active.
Output only is a three-state driver with its output path always enabled.
Input only is a three-state driver with both output path and pull-up disabled.
Three-state is a three-state driver with pull-up disabled.
Rev. J |
Page 13 of 60 |
July 2013
相关PDF资料
ADZS-21371-EZLITE KIT EVAL EZLITE ADZS-21371
ADZS-21469-EZLITE KIT EVAL EZ LITE ADSP-21469
ADZS-21479-EZLITE KIT EVAL EZ BOARD ADSP-2147X
ADZS-21489-EZLITE KIT EVAL EZ BOARD ADSP-2148X
ADZS-218X-ICE-2.5V EMULATOR SRL FOR ADDS-218X-ICE
ADZS-BF506F-EZLITE KIT EVAL EZLITE ADSP-BF506F
ADZS-BF518F-EZLITE KIT EZ LITE BF512F/14F/16F/18F
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